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FEATURES
n n n n n n n n n n n n n n
LT3083 Adjustable 3A Single Resistor Low Dropout Regulator DESCRIPTION
The LT(R)3083 is a 3A low dropout linear regulator that can be paralleled to increase output current or spread heat on surface mounted boards. Architected as a precision current source and voltage follower, this new regulator finds use in many applications requiring high current, adjustability to zero, and no heat sink. The device also brings out the collector of the pass transistor to allow low dropout operation--down to 310mV--when used with multiple supplies. A key feature of the LT3083 is the capability to supply a wide output voltage range. By using a reference current through a single resistor, the output voltage is programmed to any level between zero and 23V (DD-PAK and TO-220 packages). The LT3083 is stable with 10F of capacitance on the output, and the IC is stable with small ceramic capacitors that do not require additional ESR as is common with other regulators. Internal protection circuitry includes current limiting and thermal limiting. The LT3083 is offered in the 16-lead TSSOP (with an exposed pad for better thermal characteristics), 12-lead 4mm x 4mm DFN (also with an exposed pad), 5-lead TO-220, and 5-lead surface mount DD-PAK packages.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Outputs May be Paralleled for Higher Current and Heat Spreading Output Current: 3A Single Resistor Programs Output Voltage 50A Set Pin Current: 1% Initial Accuracy Output Adjustable to 0V Low Output Noise: 40VRMS (10Hz to 100kHz) Wide Input Voltage Range: 1.2V to 23V (DD-Pak and TO-220 Packages) Low Dropout Voltage: 310mV <1mV Load Regulation <0.001%/V Line Regulation Minimum Load Current: 1mA Stable with Minimum 10F Ceramic Capacitor Current Limit with Foldback and Overtemperature Protection Available in 16-Lead TSSOP 12-Lead 4mm x 4mm , DFN, 5-Lead TO-220 and 5-Lead Surface Mount DD-PAK Packages
APPLICATIONS
n n n n n
High Current All Surface Mount Supply High Efficiency Linear Regulator Post Regulator for Switching Supplies Low Parts Count Variable Voltage Supply Low Output Voltage Power Supplies
TYPICAL APPLICATION
1.5V to 0.9V at 3A Supply (Using 3.3V VCONTROL)
VCONTROL 3.3V 4.7F VCONTROL VIN 1.5V 10F IN LT3083 SET
3083 TA01a
Set Pin Current Distribution
N = 1052
OUT 10F *RMIN 909
VOUT = 0.9V IMAX = 3A
RSET 18.2k 1%
0.1F
*OPTIONAL FOR MINIMUM 1mA LOAD REQUIREMENT 49 49.5 50 50.5 SET PIN CURRENT DISTRIBUTION (A) 51
3083 TA01b
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LT3083 ABSOLUTE MAXIMUM RATINGS
(Note 1) All Voltages Relative to VOUT
CONTROL Pin Voltage.............................................28V IN Pin Voltage (T5, Q Packages) ....................18V, -0.3V No Overload or Short-Circuit .....................23V, -0.3V IN Pin Voltage (DF, FE Packages) .....................8V, -0.3V No Overload or Short-Circuit .....................14V, -0.3V SET Pin Current (Note 7) .....................................25mA SET Pin Voltage (Relative to OUT) .......................... 10V
Output Short-Circuit Duration .......................... Indefinite Operating Junction Temperature Range (Notes 2, 10) E-, I-grades ........................................ -40C to 125C MP-grade ........................................... -55C to 125C Storage Temperature Range .................. -65C to 150C Lead Temperature (Soldering, 10 sec) T, Q, FE Packages Only ..................................... 300C
PIN CONFIGURATION
TOP VIEW TOP VIEW OUT OUT OUT OUT OUT SET 1 2 3 4 5 6 13 OUT 12 IN 11 IN 10 IN 9 IN 8 VCONTROL 7 VCONTROL OUT OUT OUT OUT OUT OUT SET OUT 1 2 3 4 5 6 7 8 17 OUT 16 OUT 15 IN 14 IN 13 IN 12 IN 11 VCONTROL 10 VCONTROL 9 OUT
DF PACKAGE 12-LEAD (4mm 4mm) PLASTIC DFN TJMAX = 125C, JA = 37C/W, JC = 8C/W EXPOSED PAD (PIN 13) IS OUT, MUST BE SOLDERED TO PCB
FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 125C, JA = 25C/W, JC = 8C/W EXPOSED PAD (PIN 17) IS OUT, MUST BE SOLDERED TO PCB
FRONT VIEW 5 4 TAB IS OUT 3 2 1 Q PACKAGE 5-LEAD PLASTIC DD-PAK TJMAX = 125C, JA = 15C/W, JC = 3C/W IN VCONTROL OUT SET NC TAB IS OUT
FRONT VIEW 5 4 3 2 1 T PACKAGE 5-LEAD PLASTIC TO-220 TJMAX = 125C, JA = 40C/W, JC = 3C/W IN VCONTROL OUT SET NC
ORDER INFORMATION
LEAD FREE FINISH LT3083EDF#PBF LT3083EFE#PBF LT3083EQ#PBF LT3083ET#PBF LT3083IDF#PBF LT3083IFE#PBF TAPE AND REEL LT3083EDF#TRPBF LT3083EFE#TRPBF LT3083EQ#TRPBF LT3083ET#TRPBF LT3083IDF#TRPBF LT3083IFE#TRPBF PART MARKING* 3083 3083FE LT3083Q LT3083T 3083 3083FE PACKAGE DESCRIPTION 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP TEMPERATURE RANGE -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C
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LT3083 ORDER INFORMATION
LEAD FREE FINISH LT3083IQ#PBF LT3083IT#PBF LT3083MPDF#PBF LT3083MPFE#PBF LT3083MPQ#PBF LT3083MPT#PBF LEAD BASED FINISH LT3083EDF LT3083EFE LT3083EQ LT3083ET LT3083IDF LT3083IFE LT3083IQ LT3083IT LT3083MPDF LT3083MPFE LT3083MPQ LT3083MPT TAPE AND REEL LT3083IQ#TRPBF LT3083IT#TRPBF LT3083MPDF#TRPBF LT3083MPFE#TRPBF LT3083MPQ#TRPBF LT3083MPT#TRPBF TAPE AND REEL LT3083EDF#TR LT3083EFE#TR LT3083EQ#TR LT3083ET#TR LT3083IDF#TR LT3083IFE#TR LT3083IQ#TR LT3083IT#TR LT3083MPDF#TR LT3083MPFE#TR LT3083MPQ#TR LT3083MPT#TR PART MARKING* LT3083Q LT3083T 083MP 3083MPFE LT3083MPQ LT3083MPT PART MARKING* 3083 3083FE LT3083Q LT3083T 3083 3083FE LT3083Q LT3083T 083MP 3083MPFE LT3083MPQ LT3083MPT PACKAGE DESCRIPTION 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 PACKAGE DESCRIPTION 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 12-Lead (4mm x 4mm) Plastic DFN 16-Lead Plastic TSSOP 5-Lead Plastic DD-PAK 5-Lead Plastic TO-220 TEMPERATURE RANGE -40C to 125C -40C to 125C -55C to 125C -55C to 125C -55C to 125C -55C to 125C TEMPERATURE RANGE -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C -40C to 125C -55C to 125C -55C to 125C -55C to 125C -55C to 125C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
PARAMETER SET Pin Current Output Offset Voltage (VOUT - VSET) VIN = 1V, VCONTROL = 2V, ILOAD = 1mA ISET VOS CONDITIONS
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 2).
MIN
l l
TYP 50 50 0 0 0 0 -10 -0.4 -10 -0.7 0.1 0.002 0.1 0.002
MAX 50.5 51 3 4 4 6 -1 -4 0.01 0.01 500 1
UNITS A A mV mV mV mV nA mV nA mV nA/V mV/V nA/V mV/V A mA
VIN = 1V, VCONTROL = 2V, ILOAD = 1mA, TJ = 25C VIN 1V, VCONTROL 2V, 5mA ILOAD 3A (Note 9) DF FE Packages , T, Q Packages
49.5 49 -3 -4 -4 -6
l
Load Regulation (DF FE Packages) , Load Regulation (T, Q Packages) Line Regulation (DF FE Packages) , Line Regulation (T, Q Packages) Minimum Load Current (Notes 3, 9)
ISET VOS ISET VOS ISET VOS ISET VOS
ILOAD = 1mA to 3A ILOAD = 5mA to 3A (Note 8) ILOAD = 1mA to 3A ILOAD = 5mA to 3A (Note 8) VIN = 1V to 14V, VCONTROL = 2V to 25V, ILOAD = 1mA VIN = 1V to 14V, VCONTROL = 2V to 25V, ILOAD = 1mA VIN = 1V to 23V, VCONTROL = 2V to 25V, ILOAD = 1mA VIN = 1V to 23V, VCONTROL = 2V to 25V, ILOAD = 1mA VIN = 1V, VCONTROL = 2V VIN = 14V (DF/FE) or 23V (T/Q), VCONTROL = 25V
l l
l l
350
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LT3083 ELECTRICAL CHARACTERISTICS
PARAMETER VCONTROL Dropout Voltage (Note 4) CONDITIONS ILOAD = 100mA ILOAD = 1A ILOAD = 3A ILOAD = 100mA ILOAD = 1A, Q, T Packages ILOAD = 1A, DF FE Packages , ILOAD = 3A, Q, T Packages ILOAD = 3A, DF FE Packages , VCONTROL Pin Current (Note 5) ILOAD = 100mA ILOAD = 1A ILOAD = 3A VIN = 5V, VCONTROL = 5V, VSET = 0V, VOUT = -0.1V , ILOAD = 500mA, 10Hz f 100kHz, COUT = 10F CSET = 0.1F 10Hz f 100kHz f = 120Hz f = 10kHz f = 1MHz 10ms Pulse
l l l l l l l l l l l
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C (Note 2).
MIN TYP 1.2 1.22 1.25 10 120 90 310 240 5.5 18 40 3 3.7 40 1 85 75 20 0.003 MAX 1.55 1.6 25 190 160 510 420 10 35 80 UNITS V V V mV mV mV mV mV mA mA mA A VRMS nARMS dB dB dB %/W
VIN Dropout Voltage (Note 4)
Current Limit Error Amplifier RMS Output Noise (Note 6) Reference Current RMS Output Noise (Note 6) Ripple Rejection VRIPPLE = 0.5VP-P, IL = 0.1A, CSET = 0.1F , COUT = 10F Thermal Regulation, ISET
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Unless otherwise specified, all voltages are with respect to VOUT. The LT3083 is tested and specified under pulse load conditions such that TJ TA. The LT3083E is 100% tested at TA = 25C. Performance of the LT3083E over the full -40C to 125C operating junction temperature range is assured by design, characterization, and correlation with statistical process controls. The LT3083I regulators are guaranteed over the full -40C to 125C operating junction temperature range. The LT3083MP is 100% tested and guaranteed over the -55C to 125C operating junction temperature range. Note 3: Minimum load current is equivalent to the quiescent current of the part. Since all quiescent and drive current is delivered to the output of the part, the minimum load current is the minimum current required to maintain regulation. Note 4: For the LT3083, dropout is caused by either minimum control voltage (VCONTROL) or minimum input voltage (VIN). Both parameters are specified with respect to the output voltage. The specifications represent the minimum input-to-output differential voltage required to maintain regulation.
Note 5: The VCONTROL pin current is the drive current required for the output transistor. This current will track output current with roughly a 1:60 ratio. The minimum value is equal to the quiescent current of the device. Note 6: Output noise is lowered by adding a small capacitor across the voltage setting resistor. Adding this capacitor bypasses the voltage setting resistor shot noise and reference current noise; output noise is then equal to error amplifier noise (see the Applications Information section). Note 7: The SET pin is clamped to the output with diodes through 1k resistors. These resistors and diodes will only carry current under transient overloads. Note 8: Load regulation is Kelvin sensed at the package. Note 9: Current limit includes foldback protection circuitry. Current limit decreases at higher input-to-output differential voltages. Note 10: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed the maximum operating junction temperature when overtemperature protection is active. Overtemperature protection (thermal limit) is typically active at junction temperatures of 165C. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
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LT3083 TYPICAL PERFORMANCE CHARACTERISTICS
SET Pin Current
50.5 50.4 50.3 SET PIN CURRENT (A) OFFSET VOLTAGE (mV) 50.2 50.1 50.0 49.9 49.8 49.7 49.6 49.5 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3083 G01
TA = 25C, unless otherwise noted.
Set Pin Current Distribution
N = 1052 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 49 49.5 50 50.5 SET PIN CURRENT DISTRIBUTION (A) 51
Offset Voltage (VOUT - VSET)
ILOAD = 5mA
-1.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3083 G03
3083 G02
Offset Voltage Distribution
N = 1052 1.00 0.75 OFFSET VOLTAGE (mV)
Offset Voltage (VOUT - VSET)
ILOAD = 5mA 0.25 0 OFFSET VOLTAGE (mV) -0.25 -0.50 -0.75 -1.00 -1.25 -1.50 0 10 15 20 5 INPUT-TO-OUTPUT VOLTAGE (V) 25
3083 G05
Offset Voltage (VOUT - VSET)
TJ = 25C
0.50 0.25 0 -0.25 -0.50 -0.75
TJ = 125C
-3
-2
-1 0 1 2 VOS DISTRIBUTION (mV)
3
3083 G04
-1.00
-1.75
0
0.5
1 1.5 2 LOAD CURRENT (A)
2.5
3
3083 G06
Load Regulation
CHANGE IN OFFSET VOLTAGE WITH LOAD (mV) 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 CHANGE IN REFERENCE CURRENT CHANGE IN OFFSET VOLTAGE (VOUT - VSET) 100 50 0 -50 -100 -150 -200
Minimum Load Current
1.4 MINIMUM LOAD CURRENT (mA) 1.2 1.0 VIN,CONTROL - VOUT = 23V 0.8 0.6 VIN, CONTROL - VOUT = 1.5V 0.4 0.2 0 -50 -25 MINIMUM VOLTAGE (VIN - VOUT) (mV) VIN = VCONTROL 400 350 300 250 200
Dropout Voltage, T/Q Packages (Minimum IN Voltage)
CHANGE IN REFERENCE CURRENT WITH LOAD (nA)
TJ = 125C
TJ = 25C TJ = -50C
150 100 50 0 0 0.5 1 1.5 2 LOAD CURRENT (A) 2.5 3
3083 G09
-250 -1.4 ILOAD = 5mA TO 3A VIN = VCONTROL = VOUT + 2V -300 -1.6 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3083 G07
0
25 50 75 100 125 150 TEMPERATURE (C)
3083 G08
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LT3083 TYPICAL PERFORMANCE CHARACTERISTICS
Dropout Voltage, FE/DF Packages
400 MINIMUM IN VOLTAGE (VIN - VOUT) (mV) MINIMUM VOLTAGE (VIN - VOUT) (mV) 350 300 250 200 150 100 50 0 0 0.5 1 1.5 2 LOAD CURRENT (A) 2.5 3
3083 G10
TA = 25C, unless otherwise noted. Dropout Voltage, FE/DF Packages (Minimum IN Voltage)
500 MINIMUM IN VOLTAGE (VIN - VOUT) (mV) 450 400 350 300 250 200 150 100 50 0 -50 -25 0 ILOAD = 500mA ILOAD = 100mA 25 50 75 100 125 150 TEMPERATURE (C)
3083 G12
Dropout Voltage, T/Q Packages (Minimum IN Voltage)
500 450 400 350 300 250 200 150 100 50 0 -50 -25 0 ILOAD = 500mA ILOAD = 100mA 25 50 75 100 125 150 TEMPERATURE (C)
3083 G11
TJ = 125C
ILOAD = 3A
ILOAD = 3A
TJ = 25C
ILOAD = 1.5A
ILOAD = 1.5A
TJ = -50C
Dropout Voltage (Minimum VCONTROL Pin Voltage)
1.6 MINIMUM VCONTROL PIN VOLTAGE (VCONTROL - VOUT) (V) TJ = -50C 1.2 1.0 TJ = 125C 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2 LOAD CURRENT (A) 2.5 3
3083 G13
Dropout Voltage (Minimum VCONTROL Pin Voltage)
1.6 MINIMUM VCONTROL PIN VOLTAGE (VCONTROL - VOUT) (V) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3083 G14
1.4 TJ = 25C
ILOAD = 3A
Current Limit
5.0 4.5 4.0 CURRENT LIMIT (A) CURRENT LIMIT (A) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 VIN = VCONTROL = 7V VOUT = 0V 0 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3083 G15
Current Limit
4.0 TJ = 25C 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 5 10 15 20 IN-TO-OUT DIFFERENTIAL (VIN - VOUT) (V)
3083 G16
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LT3083 TYPICAL PERFORMANCE CHARACTERISTICS
Load Transient Response
OUTPUT VOLTAGE DEVIATION (mV) 150 LOAD CURRENT (A) OUTPUT VOLTAGE DEVIATION (mV) VIN = 2V 100 VCONTROL = 3V VOUT = 1V 50 CSET = 0.1F 0 -50 LOAD CURRENT (A) -100 1.0 0.5 0 0 ILOAD = 100mA TO 1A 20 40 60 80 100 120 140 160 180 200 TIME (s)
3083 G17
TA = 25C, unless otherwise noted.
Load Transient Response
250 150 50 -50 -150 4 2 0 0 20 40 60 80 100 120 140 160 180 200 TIME (s)
3083 G18
COUT = 22F CERAMIC
VIN = 2V VCONTROL = 3V VOUT = 1V CSET = 0.1F COUT = 22F CERAMIC
COUT = 10F CERAMIC
ILOAD = 500mA TO 3A
Line Transient Response
7 IN/ VCONTROL VOLTAGE (V) 6 5 4 3 OUTPUT VOLTAGE DEVIATION (mV) 10 OUTPUT VOLTAGE (V) 0 -10 -20 0 20 40 60 80 100 120 140 160 180 200 TIME (s)
3083 G19
Turn-On Response
6 5 IN/ VCONTROL VOLTAGE (V) 4 3 2 1 0 OUTPUT VOLTAGE (V) 1.0 0.5 0 0 5 RSET = 20k CSET = 0 RLOAD = 0.33 COUT = 10F CERAMIC 10 15 20 25 30 35 40 45 50 TIME (s)
3083 G20
Turn-On Response
4 3 IN/ VCONTROL VOLTAGE (V) 2 1 0 1.0 0.5 0 0 2 4 6 RSET = 20k CSET = 0.1F RLOAD = 1 COUT = 10F CERAMIC 8 10 12 14 16 18 20 TIME (ms)
3083 G21
VOUT = 1V ILOAD = 10mA COUT = 10F CERAMIC CSET = 0.1F
-0.5
-0.5
VCONTROL Pin Current
80 70 VCONTROL PIN CURRENT (mA) VCONTROL PIN CURRENT (mA) 60 50 40 ILOAD = 3A 30 20 10 0 0 ILOAD = 1.5A DEVICE IN CURRENT LIMIT 70 60 50
VCONTROL Pin Current
VCONTROL - VOUT = 2V VIN - VOUT = 1V OUTPUT VOLTAGE (mV) 600 500
Residual Output Voltage with Less Than Minimum Load
VIN = 20V VIN = 10V 400 VIN = 5V 300 200 100 0 ADD 1N4148 FOR RTEST < 1k SET PIN = 0V VIN VOUT RTEST
TJ = -50C 40 30 20 TJ = 125C 10 0 TJ = 25C
2 4 6 8 10 12 14 16 18 IN-TO-OUT DIFFERENTIAL (VIN - VOUT) (V)
3083 G22
0
0.5
1 1.5 2 LOAD CURRENT (A)
2.5
3
3083 G23
0
500
1000 RSET ()
1500
2000
3083 G24
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LT3083 TYPICAL PERFORMANCE CHARACTERISTICS
Ripple Rejection, Single Supply
100 90 80 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) 70 60 50 40 30 COUT = 10F CERAMIC 20 CSET = 0.1F CERAMIC 10 RIPPLE = 50mVP-P VIN - VCONTROL = VOUT(NOMINAL) + 2V 0 10 100 1k 10k 100k 1M FREQUENCY (Hz) ILOAD = 1.5A ILOAD = 0.5A ILOAD = 0.1A 120 105 RIPPLE REJECTION (dB) 90 75 60 I LOAD = 1.5A 45 30 15 10M
3083 G25
TA = 25C, unless otherwise noted. Ripple Rejection, Dual Supply, IN Pin
120 105 ILOAD = 0.1A ILOAD = 0.5A
Ripple Rejection, Dual Supply, VCONTROL Pin
ILOAD = 0.1A
90 75 60 45 30 15
ILOAD = 1.5A COUT = 10F CERAMIC CSET = 0.1F VIN = VOUT(NOMINAL) + 1V VCONTROL = VOUT(NOMINAL) + 2V 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
3083 G27
COUT = 10F CERAMIC CSET = 0.1F VIN = VOUT(NOMINAL) + 1V VCONTROL = VOUT(NOMINAL) + 2V 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M
3083 G26
0
0
Ripple Rejection (120Hz)
80 79 ERROR AMPLIFIER NOISE SPECTRAL DENSITY (nV/Hz) 1000
Noise Spectral Density
100
REFERENCE CURRENT NOISE SPECTRAL DENSITY (pA/Hz)
78 RIPPLE REJECTOIN (dB) 77 76 75 74 73 72 71 VIN = VCONTROL = VOUT(NOMINAL) + 2V RIPPLE = 500mVP-P, = 120Hz ILOAD = 0.5A CSET = 0.1F, COUT = 10F 0 25 50 75 100 125 150 TEMPERATURE (C)
3083 G28
100
10
70 -50 -25
10
10
100
1k 10k FREQUENCY (Hz)
1 100k
3083 G29
Output Voltage Noise
21 18 15 12 9 GAIN (dB) VOUT 100V/DIV 6 3 0 -3 -6 -9 -12 TIME 1ms/DIV VOUT = 1V, RSET = 20k CSET = 0.1F, COUT = 10F ILOAD = 3A
3083 G30
Error Amplifier Gain and Phase
36 PHASE 0 -36 -72 -108 -144 -180 GAIN -216 -252 -288 ILOAD = 0.5A ILOAD = 1.5A ILOAD = 3A 10 100 1k 10k FREQUENCY (Hz) 100k -324 -360 -396 1M
3083 G31
-15
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LT3083 PIN FUNCTIONS
(DF/FE/Q/T Packages)
OUT (Pins 1-5,13/Pins 1-6,8,9,16,17/ Pin 3, Tab/Pin 3, Tab): Output. The exposed pad of the DF package (Pin 13) and the FE package (Pin 17) and the Tab of the DD-PAK and TO-220 packages is an electrical connection to OUT. Connect the exposed pad of the DF and FE packages and the Tab of the DD-PAK package directly to OUT on the PCB and the respective OUT pins for each package. There must be a minimum load current of 1mA or the output may not regulate. SET (Pin 6/Pin 7/Pin 2/Pin 2): Set Point. This pin is the non-inverting input to the error amplifier and the regulation set point. A fixed current of 50A flows out of this pin through a single external resistor, which programs the output voltage of the device. Output voltage range is zero to the VIN(MAX) - VDROPOUT. Transient performance can be improved by adding a small capacitor from the SET pin to ground.
VCONTROL (Pins 7,8/Pins 10,11/Pin 4/Pin 4): Bias Supply. This is the supply pin for the control circuitry of the device. Minimum input capacitance is 2.2F (see Input Capacitance and Stability in the Applications Information section). The current flow into this pin is about 1.7% of the output current. For the device to regulate, this voltage must be more than 1.2V to 1.4V greater than the output voltage (see dropout specifications in the Electrical Characteristics section). IN (Pins 9-12/Pins 12-15/Pin 5/Pin 5): Power Input. This is the collector to the power device of the LT3083. The output load current is supplied through this pin. Minimum IN capacitance is 10F (see Input Capacitance and Stability in Applications Information section). For the device to regulate, the voltage at this pin must be more than 0.1V to 0.5V greater than the output voltage (see dropout specifications in the Electrical Characteristics section). NC (NA/NA/Pin 1/Pin 1): No Connection. No Connect pins have no connection to internal circuitry and may be tied to VIN, VCONTROL, VOUT, GND, or floated.
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LT3083 BLOCK DIAGRAM
IN VCONTROL 50A
+ -
3083 BD
SET
OUT
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LT3083 APPLICATIONS INFORMATION
The LT3083 regulator is easy to use and has all the protection features expected in high performance regulators. Included are short-circuit protection and safe operating area protection, as well as thermal shutdown with hysteresis. The LT3083 fits well in applications needing multiple rails. This new architecture adjusts down to zero with a single resistor, handling modern low voltage digital IC's as well as allowing easy parallel operation and thermal management without heat sinks. Adjusting to zero output allows shutting off the powered circuitry. When the input is pre-regulated, such as with a 5V or 3.3V input supply, external resistors can help spread the heat. A precision "0" TC 50A reference current source connects to the noninverting input of a power operational amplifier. The power operational amplifier provides a low impedance buffered output to the voltage on the noninverting input. A single resistor from the noninverting input to ground sets the output voltage. If this resistor is set to 0, zero output voltage results. Therefore, any output voltage can be obtained between zero and the maximum defined by the input power supply. The benefit of using a true internal current source as the reference, as opposed to a bootstrapped reference in older regulators, is not so obvious in this architecture. A true reference current source allows the regulator to have gain and frequency response independent of the impedance on the positive input. On older adjustable regulators, such as the LT1086, loop gain changes with output voltage and bandwidth changes if the adjustment pin is bypassed to ground. For the LT3083, the loop gain is unchanged with output voltage changes or bypassing. Output regulation is not a fixed percentage of output voltage, but is a fixed fraction of millivolts. Use of a true current source allows all of the gain in the buffer amplifier to provide regulation, and none of that gain is needed to amplify up the reference to a higher output voltage. The LT3083 has the collector of the output transistor connected to a separate pin from the control input. Since the dropout on the collector (IN pin) is typically only 310mV, two supplies can be used to power the LT3083 to reduce dissipation: a higher voltage supply for the control circuitry and a lower voltage supply for the collector. This increases efficiency and reduces dissipation. To further spread the heat, a resistor inserted in series with the collector moves some of the heat out of the IC to spread it on the PC board (see the section Reducing Power Dissipation). The LT3083 can be operated in two modes. Three terminal mode has the VCONTROL pin connected to the IN pin and gives a limitation of 1.25V dropout. Alternatively, the VCONTROL pin is separately tied to a higher voltage and the IN pin to a lower voltage giving 310mV dropout on the IN pin, minimizing total power dissipation. This allows for a 3A supply regulating from 2.5VIN to 1.8VOUT or 1.8VIN to 1.2VOUT with low power dissipation. Programming Output Voltage The LT3083 sources a 50A reference current that flows out of the SET pin. Connecting a resistor from SET to ground generates a voltage that becomes the reference point for the error amplifier (see Figure 1). The reference voltage equals 50A multiplied by the value of the SET pin resistor. Any voltage can be generated and there is no minimum output voltage for the regulator.
IN VCONTROL 50A LT3083
+
VIN
+
VCONTROL
+ -
OUT SET COUT RSET CSET
3083 F01
VOUT
VOUT = 50A * RSET
Figure 1. Basic Adjustable Regulator
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LT3083 APPLICATIONS INFORMATION
Table 1 lists many common output voltages and the closest standard 1% resistor values used to generate that output voltage. Regulation of the output voltage requires a minimum load current of 1mA. For a true zero voltage output operation, return this 1mA load current to a negative supply voltage.
Table 1. 1% Resistors for Common Output Voltages
VOUT (V) 1 1.2 1.5 1.8 2.5 3.3 5 RSET (k) 20 24.3 30.1 35.7 49.9 66.5 100
GND SET PIN
3083 F02
OUT
Figure 2. Guard Ring Layout Example for DF Package
to remedy this is to bypass the SET pin with a small amount of capacitance from SET to ground, 10pF to 20pF is sufficient. Stability and Input Capacitance Typical minimum input capacitance is 10F for IN and 2.2F for VCONTROL. These amounts of capacitance work well using low ESR ceramic capacitors when placed close to the LT3083 and the circuit is located in close proximity to the power source. Higher values of input capacitance may be necessary to maintain stability depending on the application. Oscillating regulator circuits are often viewed as a problem of phase margin and inadequate stability with the output capacitor used. More and more frequently, the problem is not the regulator operating without sufficient output capacitance, but instead with too little input capacitance. The entire circuit must be analyzed and debugged as a whole; conditions relating to the input of the regulator cannot be ignored. The LT3083 input presents a high impedance to its power source: the output voltage and load current are independent of input voltage variations. To maintain stability of the regulator circuit as a whole, the LT3083 must be powered from a low impedance supply. When using short supply lines or powering directly from a large switching supply, there is no issue--hundreds or thousands of microfarads of capacitance are available through a low impedance.
3083f
With the lower level current used to generate the reference voltage, leakage paths to or from the SET pin can create errors in the reference and output voltages. High quality insulation should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Minimize board leakage by encircling the SET pin and circuitry with a guard ring operated at a potential close to itself. Tie the guard ring to the OUT pin. Guard rings on both sides of the circuit board are required. Bulk leakage reduction depends on the guard ring width. 50nA of leakage into or out of the SET pin and its associated circuitry creates a 0.1% reference voltage error. Leakages of this magnitude, coupled with other sources of leakage, can cause significant offset voltage and reference drift, especially over the possible operating temperature range. Figure 2 depicts an example of a guard ring layout. If guard ring techniques are used, this bootstraps any stray capacitance at the SET pin. Since the SET pin is a high impedance node, unwanted signals may couple into the SET pin and cause erratic behavior. This will be most noticeable when operating with minimum output capacitors at full load current. The easiest way
12
LT3083 APPLICATIONS INFORMATION
When longer supply lines, filters, current sense resistors, or other impedances exist between the supply and the input to the LT3083, input bypassing should be reviewed if stability concerns are seen. Just as output capacitance supplies the instantaneous changes in load current for output transients until the regulator is able to respond, input capacitance supplies local power to the regulator until the main supply responds. When impedance separates the LT3083 from its main supply, the local input can droop so that the output follows. The entire circuit may break into oscillations, usually characterized by larger amplitude oscillations on the input and coupling to the output. Low ESR, ceramic input bypass capacitors are acceptable for applications without long input leads. However, applications connecting a power supply to an LT3083 circuit's IN and GND pins with long input wires combined with low ESR, ceramic input capacitors are prone to voltage spikes, reliability concerns and application-specific board oscillations. The input wire inductance found in many battery powered applications, combined with the low ESR ceramic input capacitor, forms a high-Q LC resonant tank circuit. In some instances this resonant frequency beats against the output current dependent LDO bandwidth and interferes with proper operation. Simple circuit modifications/solutions are then required. This behavior is not indicative of LT3083 instability, but is a common ceramic input bypass capacitor application issue. The self-inductance, or isolated inductance, of a wire is directly proportional to its length. Wire diameter is not a major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is about half the self-inductance of a 30-AWG wire (diameter = 0.01"). One foot of 30-AWG wire has about 465nH of self-inductance. One of two ways reduces a wire's self-inductance. One method divides the current flowing towards the LT3083 between two parallel conductors. In this case, the farther apart the wires are from each other, the more the self-inductance is reduced; up to a 50% reduction when placed a few inches apart. Splitting the wires basically connects two equal inductors in parallel, but placing them in close proximity gives the wires mutual inductance adding to the self-inductance. The second and most effective way to reduce overall inductance is to place both forward and return current conductors (the input and GND wires) in very close proximity. Two 30-AWG wires separated by only 0.02", used as forward- and return- current conductors, reduce the overall self-inductance to approximately onefifth that of a single isolated wire. If wiring modifications are not permissible for the applications, including series resistance between the power supply and the input of the LT3083 also stabilizes the application. As little as 0.1 to 0.5, often less, is effective in damping the LC resonance. If the added impedance between the power supply and the input is unacceptable, adding ESR to the input capacitor also provides the necessary damping of the LC resonance. However, the required ESR is generally higher than the series impedance required. Stability and Output Capacitance The LT3083 requires an output capacitor for stability. It is designed to be stable with most low ESR capacitors (typically ceramic, tantalum or low ESR electrolytic). A minimum output capacitor of 10F with an ESR of 0.5 or less is recommended to prevent oscillations. Larger values of output capacitance decrease peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3083, increase the effective output capacitor value. For improvement in transient performance, place a capacitor across the voltage setting resistor. Capacitors up to 1F can be used. This bypass capacitor reduces system noise as well, but start-up time is proportional to the time constant of the voltage setting resistor (RSET in Figure 1) and SET pin bypass capacitor. Give extra consideration to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coefficients as shown in Figures 3 and 4. When used with a 5V regulator, a 16V 10F Y5V capacitor can exhibit an
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13
LT3083 APPLICATIONS INFORMATION
20 0 CHANGE IN VALUE (%) X5R -20 -40 -60 Y5V -80 -100 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F
0
2
4
8 6 10 12 DC BIAS VOLTAGE (V)
14
16
3083 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40 20 CHANGE IN VALUE (%) 0 -20 -40 -60 -80 Y5V X5R
effective value as low as 1F to 2F for the DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors. The X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress. In a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients.
-100 -50 -25
BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10F 50 25 75 0 TEMPERATURE (C) 100 125
Paralleling Devices Higher output current is obtained by paralleling multiple LT3083s together. Tie the individual SET pins together and tie the individual IN pins together. Connect the outputs in common using small pieces of PC trace as ballast resistors to promote equal current sharing. PC trace resistance in m/inch is shown in Table 2. Ballasting requires only a tiny area on the PCB.
Table 2. PC Board Trace Resistance
WEIGHT (oz) 10mil WIDTH 54.3 27.1 20mil WIDTH 27.1 13.6 1 2
3083 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
VIN VCONTROL LT3083
+ -
SET VIN 4.8V TO 20V VIN VCONTROL LT3083
OUT 10m
Trace resistance is measured in m/in
10F
+ -
SET 33k
OUT 10m
VOUT 3.3V 6A 10F
The worst-case room temperature offset, only 4mV (DD-PAK, T Packages) between the SET pin and the OUT pin, allows the use of very small ballast resistors. As shown in Figure 5, each LT3083 has a small 10m ballast resistor, which at full output current gives better than 80% equalized sharing of the current. The external
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3083 F05
Figure 5. Parallel Devices
14
LT3083 APPLICATIONS INFORMATION
resistance of 10m (5m for the two devices in parallel) only adds about 30mV of output regulation drop at an output of 6A. With an output voltage of 3.3V, this only adds 1% to the regulation. Of course, paralleling more than two LT3083s yields even higher output current. Spreading the devices on the PC board also spreads the heat. Series input resistors can further spread the heat if the input-to-output difference is high. Quieting the Noise The LT3083 offers numerous noise performance advantages. Every linear regulator has its sources of noise. In general, a linear regulator's critical noise source is the reference. In addition, consider the error amplifier's noise contribution along with the resistor divider's noise gain. Many traditional low noise regulators bond out the voltage reference to an external pin (usually through a large value resistor) to allow for bypassing and noise reduction. The LT3083 does not use a traditional voltage reference like other linear regulators. Instead, it uses a 50A reference current. The 50A current source generates noise current levels of 3.16pA/Hz (1nARMS) over the 10Hz to 100kHz bandwidth). The equivalent voltage noise equals the RMS noise current multiplied by the resistor value. The SET pin resistor generates spot noise equal to 4kTR (k = Boltzmann's constant, 1.38 * 10-23J/K, and T is absolute temperature) which is RMS summed with the voltage noise. If the application requires lower noise performance, bypass the voltage setting resistor with a capacitor to GND. Note that this noise-reduction capacitor increases start-up time as a factor of the RC time constant. The LT3083 uses a unity-gain follower from the SET pin to the OUT pin. Therefore, multiple possibilities exist (besides a SET pin resistor) to set output voltage. For example, using a high accuracy voltage reference from SET to GND removes the errors in output voltage due to reference current tolerance and resistor tolerance. Active driving of the SET pin is acceptable. The typical noise scenario for a linear regulator is that the output voltage setting resistor divider gains up the noise reference, especially if VOUT is much greater than VREF. The LT3083's noise advantage is that the unity gain follower presents no noise gain whatsoever from the SET pin to the output. Thus, noise figures do not increase accordingly. Error amplifier noise is typically 126.5nV/Hz (40VRMS) over the 10Hz to 100kHz bandwidth). The error amplifier's noise is RMS summed with the other noise terms to give a final noise figure for the regulator. Curves in the Typical Performance Characteristics section show noise spectral density and peak-to-peak noise characteristics for both the reference current and error amplifier over the 10Hz to 100kHz bandwidth. Load Regulation The LT3083 is a floating device. No ground pin exists on the packages. Thus, the IC delivers all quiescent current and drive current to the load. Therefore, it is not possible to provide true remote load sensing. The connection resistance between the regulator and the load determines load regulation performance. The data sheet's load regulation specification is Kelvin sensed at the package's pins. Negative-side sensing is a true Kelvin connection by returning the bottom of the voltage setting resistor to the negative side of the load (see Figure 6). Connected as shown, system load regulation is the sum of the LT3083's load regulation and the parasitic line resistance multiplied by the output current. To minimize load regulation, keep the positive connection between the regulator and load as short as possible. If possible, use large diameter wire or wide PC board traces.
IN VCONTROL LT3083
+ -
OUT SET RSET
PARASITIC RESISTANCE RP RP RP
3080 F06
LOAD
Figure 6. Connections for Best Load Regulation
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15
LT3083 APPLICATIONS INFORMATION
Thermal Considerations The LT3083's internal power and thermal limiting circuitry protects itself under overload conditions. For continuous normal load conditions, do not exceed the 125C maximum junction temperature. Carefully consider all sources of thermal resistance from junction-to-ambient. This includes (but is not limited to) junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. Consider all additional, adjacent heat generating sources in proximity on the PCB. Surface mount packages provide the necessary heat sinking by using the heat spreading capabilities of the PC board, copper traces, and planes. Surface mount heat sinks, plated through-holes and solder-filled vias can also spread the heat generated by power devices. Junction-to-case thermal resistance is specified from the IC junction to the bottom of the case directly, or the bottom of the pin most directly in the heat path. This is the lowest thermal resistance path for heat flow. Only proper device mounting ensures the best possible thermal flow from this area of the packages to the heat sinking material. Note that the exposed pad of the DFN and TSSOP packages and the tab of the DD-PAK and TO-220 packages are electrically connected to the output (VOUT). Tables 3 through 5 list thermal resistance as a function of copper areas on a fixed board size. All measurements were taken in still air on a 4-layer FR-4 board with 1oz solid internal planes and 2oz external trace planes with a total finished board thickness of 1.6mm. Layers are not connected electrically or thermally.
Table 3. DF Package, 12-Lead DFN
COPPER AREA TOPSIDE* 2500mm2 1000mm2 225mm2 100mm2 BACKSIDE 2500mm2 2500mm2 2500mm2 2500mm2 THERMAL RESISTANCE BOARD AREA (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 2500mm2 18C/W 22C/W 29C/W 35C/W
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA TOPSIDE* 2500mm2 1000mm2 225mm2 100mm2 BACKSIDE 2500mm2 2500mm2 2500mm2 2500mm2 THERMAL RESISTANCE BOARD AREA (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 2500mm2 16C/W 20C/W 26C/W 32C/W
*Device is mounted on topside.
Table 5. Q Package, 5-Lead DD-PAK
COPPER AREA TOPSIDE* 2500mm2 1000mm2 125mm2 BACKSIDE 2500mm2 2500mm2 2500mm2 THERMAL RESISTANCE BOARD AREA (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 13C/W 14C/W 16C/W
*Device is mounted on topside.
T Package, 5-Lead TO-220 Thermal Resistance (Junction-to-Case) = 3C/W For further information on thermal resistance and using thermal information, refer to JEDEC standard JESD51, notably JESD51-12. PCB layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. Tables 3 through 5 provide thermal resistance numbers for best-case 4-layer boards with 1oz internal and 2oz external copper. Modern, multilayer PCBs may not be able to achieve quite the same level performance as found in these tables. Calculating Junction Temperature Example: Given an output voltage of 0.9V, a VCONTROL voltage of 3.3V 10%, an IN voltage of 1.5V 5%, output current range from 10mA to 3A and a maximum ambient temperature of 50C, what will the maximum junction temperature be for the DD-PAK on a 2500mm2 board with topside copper of 1000mm2?
*Device is mounted on topside.
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LT3083 APPLICATIONS INFORMATION
The power in the drive circuit equals: PDRIVE = (VCONTROL - VOUT)(ICONTROL) where ICONTROL is equal to IOUT/60. ICONTROL is a function of output current. A curve of ICONTROL vs IOUT can be found in the Typical Performance Characteristics curves. The total power equals: PTOTAL = PDRIVE + POUTPUT The current delivered to the SET pin is negligible and can be ignored. VCONTROL(MAX_CONTINUOUS) = 3.630V (3.3V + 10%) VIN(MAX_CONTINUOUS) = 1.575V (1.5V + 5%) VOUT = 0.9V, IOUT = 3A, TA = 50C Power dissipation under these conditions is equal to: PDRIVE = (VCONTROL - VOUT)(ICONTROL)
ICONTROL = IOUT 3A = = 50mA 60 60
As an example, assume: VIN = VCONTROL = 5V, VOUT = 3.3V and IOUT(MAX) = 2A. Use the formulas from the Calculating Junction Temperature section previously discussed. Without series resistor RS, power dissipation in the LT3083 equals:
2A PTOTAL = (5V - 3.3V ) * + (5V - 3.3V ) * 2A 60 = 3.46W
If the voltage differential (VDIFF) across the NPN pass transistor is chosen as 0.5V, then RS equals:
RS = 5V - 3.3V - 0.5V = 0.6 2A
Power dissipation in the LT3083 now equals: 2A PTOTAL = (5V - 3.3V ) * + 0.5V * 2A = 1.06W 60 The LT3083's power dissipation is now only 30% compared to no series resistor. RS dissipates 2.4W of power. Choose appropriate wattage resistors or use multiple resistors in parallel to handle and dissipate the power properly.
VIN C1 VCONTROL LT3083 IN RS VIN
PDRIVE = (3.630V - 0.9V)(50mA) = 137mW POUTPUT = (VIN - VOUT)(IOUT) POUTPUT = (1.575V - 0.9V)(3A) = 2.03W Total Power Dissipation = 2.16W Junction Temperature will be equal to: TJ = TA + PTOTAL * JA (using tables) TJ = 50C + 2.16W * 16C/W = 84.6C In this case, the junction temperature is below the maximum rating, ensuring reliable operation. Reducing Power Dissipation In some applications it may be necessary to reduce the power dissipation in the LT3083 package without sacrificing output current capability. Two techniques are available. The first technique, illustrated in Figure 7, employs a resistor in series with the regulator's input. The voltage drop across RS decreases the LT3083's input-to-output differential voltage and correspondingly decreases the LT3083's power dissipation.
+ -
OUT SET RSET
3083 F07
VOUT C2
Figure 7. Reducing Power Dissipation Using a Series Resistor
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LT3083 APPLICATIONS INFORMATION
The second technique for reducing power dissipation, shown in Figure 8, uses a resistor in parallel with the LT3083. This resistor provides a parallel path for current flow, reducing the current flowing through the LT3083. This technique works well if input voltage is reasonably constant and output load current changes are small. This technique also increases the maximum available output current at the expense of minimum load requirements.
VIN C1 VCONTROL LT3083 IN
As an example, assume: VIN = VCONTROL = 5V, VIN(MAX) = 5.5V, VOUT = 3.3V, VOUT(MIN) = 3.2V, IOUT(MAX) = 2A and IOUT(MIN) = 0.7A. Also, assuming that RP carries no more than 90% of IOUT(MIN) = 630mA. Calculating RP yields:
5.5V - 3.2V = 3.65 0.63A (5% Standard Value = 3.6) RP =
The maximum total power dissipation is (5.5V - 3.2V) * 2A = 4.6W. However, the LT3083 supplies only:
RP
+ -
OUT SET RSET
3083 F08
2A -
VOUT
5.5V - 3.2V = 1.36A 3.6
Therefore, the LT3083's power dissipation is only: PDISS = (5.5V - 3.2V) * 1.36A = 3.13W RP dissipates 1.47W of power. As with the first technique, choose appropriate wattage resistors to handle and dissipate the power properly. With this configuration, the LT3083 supplies only 1.36A. Therefore, load current can increase by 1.64A to a total output current of 3.64A while keeping the LT3083 in its normal operating range.
C2
Figure 8. Reducing Power Dissipation Using a Parallel Resistor
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LT3083 TYPICAL APPLICATIONS
Adding Shutdown
VIN IN LT3083 VIN 10V IN VCONTROL
Current Source
LT3083
VCONTROL
+ -
SET ON OFF Q1 VN2222LL SHUTDOWN R1
10F OUT VOUT SET Q2* VN2222LL
3083 TA02
+ -
OUT 0.33
IOUT 0A TO 3A 10F
20k
3083 TA03
*Q2 INSURES ZERO OUTPUT IN THE ABSENCE OF ANY OUTPUT LOAD.
Low Dropout Voltage LED Driver
VIN C1 VCONTROL LT3083 IN D1 1A
+ -
OUT SET R1 20k
R2 1
3083 TA04
DAC-Controlled Regulator
VIN IN VCONTROL LT3083
+ -
150k 450k SET OUT VOUT 10F
3083 TA05
SPI
LTC2641
150k
GAIN = 4
+ -
LT1991
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LT3083 TYPICAL APPLICATIONS
Coincident Tracking
IN VCONTROL IN VCONTROL VIN 7V TO 20V IN VCONTROL LT3083 LT3083 LT3083
+ -
OUT SET 34k OUT VOUT2 3.3V C3 10F VOUT3 5V 10F
3083 TA06
+ -
SET R2 16.2k C2 10F
C1 10F
+ -
OUT SET R1 49.9k
VOUT1 2.5V
Adding Soft-Start
VIN 4.8V to 20V IN VCONTROL D1 1N4148 C1 10F SET C2 0.01F R1 66.5k
3083 TA07
LT3083
+ -
OUT
VOUT 3.3V 3A COUT 10F
Lab Supply
VIN 12V TO 18V IN VCONTROL LT3083 IN VCONTROL LT3083
+
15F
+ -
SET
OUT 0.33
+ -
OUT VOUT 0V TO 10V
+
20k 0A TO 3A 15F
SET R4 200k 10F
+
100F
3083 TA08
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LT3083 TYPICAL APPLICATIONS
High Voltage Regulator
VIN 50V 10k 1N4148 IN BUZ11 VCONTROL 6.1V
LT3083
+
10F
+ -
OUT
VOUT 3A 10F VOUT = 20V VOUT = 50A * RSET
+
15F
SET RSET 402k
3083 TA09
Ramp Generator
VIN 5V IN VCONTROL 10F LT3083
VIN IN VCONTROL
Reference Buffer
LT3083
+ -
SET VN2222LL 10nF
OUT
+ -
VOUT 10F
OUT INPUT LT1019 GND
3083 TA10
OUTPUT
SET C1 1F
VOUT* C2 10F
3083 TA11
VN2222LL
*MIN LOAD 0.5mA
Boosting Fixed Output Regulators
IN VCONTROL LT3083
+ -
OUT SET 20m 5V 10F LT1963-3.3 42* 47F
3083 TA12
10m 3.3VOUT 4.5A
33k *4mV DROP ENSURES LT3083 IS OFF WITH NO LOAD MULTIPLE LT3083'S CAN BE USED
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LT3083 TYPICAL APPLICATIONS
Low Voltage, High Current Adjustable High Efficiency Regulator*
0.47H PVIN 2.7V TO 5.5V 2x 100F SW ITH LTC3610 PGOOD RUN/SS 1000pF VFB 78.7k SYNC/MODE SGND PGND 124k RT 294k 12.1k
10k
+
470pF
+
2.2MEG 100k
SVIN
2x 100F 2N3906
IN VCONTROL
LT3083
+ -
SET IN VCONTROL LT3083
OUT 10m
*DIFFERENTIAL VOLTAGE ON LT3083 . IS 0.6V SET BY THE VBE OF THE 2N3906 PNP
MAXIMUM OUTPUT VOLTAGE IS 1.5V
+ -
SET
OUT 10m
BELOW INPUT VOLTAGE
0V TO 4V 12A
IN VCONTROL
LT3083
+ -
SET
OUT 10m
IN VCONTROL
LT3083
+ -
SET 100k
3083 TA13
OUT 10m
+
100F
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LT3083 TYPICAL APPLICATIONS
Adjustable High Efficiency Regulator*
4.5V TO 25V 10F 1F 100k 0.1F B340A VCONTROL 15.4k 680pF RT 63.4k 600kHz GND FB 200k 10k SET 200k *DIFFERENTIAL VOLTAGE ON LT3083 1.4V SET BY THE TPO610L P-CHANNEL THRESHOLD. MAXIMUM OUTPUT VOLTAGE IS 2V BELOW INPUT VOLTAGE 10k
3083 TA14
VIN BD
BOOST 0.47F LT3680 4.7H SW 68F TP0610L IN VCONTROL LT3083
RUN/SS
+ -
OUT
0V TO 10V 3A 4.7F
2 Terminal Current Source
CCOMP*
IN VCONTROL
LT3083
+ -
SET 20k
R1
3083 TA15
*CCOMP R1 10 10F R1 10 2.2F
IOUT =
1V R1
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LT3083 PACKAGE DESCRIPTION
FE Package 16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev H)
Exposed Pad Variation BB
3.58 (.141)
4.90 - 5.10* (.193 - .201) 3.58 (.141) 16 1514 13 12 1110 9
6.60 0.10 4.50 0.10
SEE NOTE 4
2.94 (.116) 0.45 0.05 1.05 0.10 0.65 BSC 2.94 6.40 (.116) (.252) BSC
RECOMMENDED SOLDER PAD LAYOUT
12345678 1.10 (.0433) MAX
0 -8
4.30 - 4.50* (.169 - .177)
0.25 REF
0.09 - 0.20 (.0035 - .0079)
0.50 - 0.75 (.020 - .030)
0.65 (.0256) BSC
NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE
0.195 - 0.30 (.0077 - .0118) TYP
0.05 - 0.15 (.002 - .006)
FE16 (BB) TSSOP REV G 0910
4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE
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LT3083 PACKAGE DESCRIPTION
DF Package 12-Lead Plastic DFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1733 Rev O)
2.50 REF 0.70 0.05
4.50
0.05 3.10 0.05
3.38 0.05 2.65 0.05
PACKAGE OUTLINE
0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 0.10 (4 SIDES) 2.50 REF 7 12 0.40 0.10
3.38 0.10 2.65 0.10
PIN 1 TOP MARK (NOTE 6) 6 R = 0.115 TYP 0.75 0.05 1 0.25 0.05 0.50 BSC
PIN 1 NOTCH R = 0.20 TYP OR 0.35 45 CHAMFER
(DF12) DFN 0806 REV O
0.200 REF
BOTTOM VIEW--EXPOSED PAD
0.00 - 0.05 NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)--TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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LT3083 PACKAGE DESCRIPTION
Q Package 5-Lead Plastic DD-PAK
(Reference LTC DWG # 05-08-1461 Rev E)
.256 (6.502)
.060 (1.524)
.060 (1.524) TYP
.390 - .415 (9.906 - 10.541) 15 TYP
.165 - .180 (4.191 - 4.572)
.045 - .055 (1.143 - 1.397) +.008 .004 -.004 +0.203 0.102 -0.102 .095 - .115 (2.413 - 2.921)
.060 (1.524)
.183 (4.648)
.330 - .370 (8.382 - 9.398)
.059 (1.499) TYP
.075 (1.905) .300 (7.620) BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK +.012 .143 -.020 +0.305 3.632 -0.508 .067 (1.702) .028 - .038 BSC (0.711 - 0.965) TYP
.013 - .023 (0.330 - 0.584)
.050 (1.270
.012 0.305)
.420
.080
.420 .276
.350 .205 .585
.325 .585
.320 .090 .067 .042 .067 .090 .042
RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN INCH/(MILLIMETER) 2. DRAWING NOT TO SCALE
RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE APPLICATIONS
Q(DD5) 0610 REV E
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LT3083 PACKAGE DESCRIPTION
T Package 5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
.390 - .415 (9.906 - 10.541)
.147 - .155 (3.734 - 3.937) DIA .230 - .270 (5.842 - 6.858)
.165 - .180 (4.191 - 4.572)
.045 - .055 (1.143 - 1.397)
.460 - .500 (11.684 - 12.700)
.570 - .620 (14.478 - 15.748) .330 - .370 (8.382 - 9.398) .700 - .728 (17.78 - 18.491)
.620 (15.75) TYP
SEATING PLANE .152 - .202 .260 - .320 (3.861 - 5.131) (6.60 - 8.13)
.095 - .115 (2.413 - 2.921) .155 - .195* (3.937 - 4.953) .013 - .023 (0.330 - 0.584)
BSC
.067 (1.70)
.028 - .038 (0.711 - 0.965)
.135 - .165 (3.429 - 4.191)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0801
3083f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3083 TYPICAL APPLICATION
Paralleling Regulators
IN VCONTROL LT3083
+ -
SET VIN 4.8V TO 28V IN VCONTROL LT3083
OUT 10m
+ -
10F SET 33.2k OUT
10m
VOUT 3.3V 6A 22F
3083 TA16
RELATED PARTS
PART NUMBER LT1185 LT1764/ LT1764A LT1963/A LT1965 LT3022 DESCRIPTION 3A Negative Low Dropout Regulator 3A, Fast Transient Response, Low Noise LDO 1.5A Low Noise, Fast Transient Response LDO 1.1A, Low Noise, Low Dropout Linear Regulator 1A, Low Voltage, VLDO Linear Regulator 5A, Low Noise, Programmable VOUT, 85mV Dropout Linear Regulator with Digital Margining 5A, Low Noise, Programmable Vout, 85mV Dropout Linear Regulator with Analog Margining 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator COMMENTS VIN: -4.5V to -35V, 0.8V Dropout Voltage, DD-PAK and TO-220 Packages 340mV Dropout Voltage, Low Noise: 40VRMS, VIN = 2.7V to 20V, TO-220 and DD Packages. "A" Version Stable Also with Ceramic Capacitors 340mV Dropout Voltage, Low Noise: 40VRMS, VIN = 2.5V to 20V, "A" Version Stable with Ceramic Capacitors, TO-220, DD, SOT-223 and SO-8 Packages 290mV Dropout Voltage, Low Noise: 40VRMS, VIN: 1.8V to 20V, VOUT: 1.2V to 19.5V, Stable with Ceramic Capacitors, TO-220, DD-PAK, MSOP and 3mm x 3mm DFN Packages VIN: 0.9V to 10V, Dropout Voltage: 145mV Typical, Adjustable Output (VREF = VOUT(MIN) = 200mV), Stable with Low ESR, Ceramic Output Capacitors, 16-Pin DFN (5mm x 3mm) and 16-Lead MSOP Packages Dropout Voltage: 85mV, Digitally Programmable VOUT: 0.8V to 1.8V, Digital Output Margining: 1%, 3% or 5%, Low Output Noise: 25VRMS (10Hz to 100kHz), Parallelable: Use Two for a 10A Output, Stable with Low ESR Ceramic Output Capacitors (15F Minimum), 28-Lead 4mm x 5mm QFN Package Dropout Voltage: 85mV, Digitally Programmable VOUT: 0.8V to 1.8V, Analog Margining: 10%, Low Output Noise: 25VRMS (10Hz to 100kHz), Parallelable: Use Two for a 10A Output, IMON Output Current Monitor, Stable with Low ESR Ceramic Output Capacitors (15F Minimum), 28-Lead 4mm x 5mm QFN Package 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40VRMS, VIN : 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors, TO-220, DD-PAK, SOT-223, MS8E and 3mm x 3mm DFN-8 Packages; "-1" Version Has Integrated Internal Ballast Resistor Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage Range: 1.2V to 40V, Low Value Input/Output Capacitors Required: 0.22F Single Resistor Sets , Output Voltage, 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm x 3mm DFN Packages 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40VRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors, MS8E and 2mm x 3mm DFN-6 Packages VIN: 1.14V to 3.5V (Boost Enabled), 1.14V to 5.5V (with External 5V), VDO = 0.1V, IQ = 950A, Stable with 10F Ceramic Capacitors, 10-Lead MSOP-E and DFN-10 Packages
3083f LT 0111 * PRINTED IN USA
LT3070
LT3071
LT3080/ LT3080-1
LT3082
200mA, Parallelable, Single Resistor, Low Dropout Linear Regulator 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 1.5A, Low Input Voltage VLDO Linear Regulator
LT3085
LTC3026
28 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2011

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